This invention relates generally to the field of electronic circuits and more particularly to a method and system for switching between multiple clock signals in a digital circuit.
In designing digital circuits for use in systems such as telecommunications networks, it is often desirable to incorporate redundancies so that a malfunction or failure of one component does not disable the entire system. For example, conventional telecommunications networks generally include two clock signals produced by two different clocks.
In switching from one clock signal to the other, it is important that no glitches occur. A glitch occurs when two rising or two falling clock edges occur in less than the period of the clock signal. If the digital circuit experiences a glitch, the set-up and hold requirements for the circuit may not be met and the flip-flops can enter an indeterminate or unstable state. This could result in unrecoverable errors.
Conventional attempts to provide switching between two clock signals without glitches fail to provide for switching between clock signals when the currently selected clock is inactive. Thus, clock signals cannot be switched using these methods when the current clock malfunctions or fails, which is one of the most important reasons for switching between clock signals.
More recently, a system for switching between clock signals has been implemented in a field-programmable gate array that provides for switching between two clock signals without requiring the currently selected clock to be active. However, in some situations, it may be desirable to switch between three or more clock signals in order to provide increased protection for critical systems in which failures cannot be tolerated.
In accordance with the present invention, a method and system for switching between multiple clock signals in a digital circuit are provided that substantially eliminate or reduce disadvantages and problems associated with previously developed systems and methods. In particular, a system may switch from an inactive clock signal to one of two or more other clock signals without producing any glitches.
In one embodiment of the present invention, a method for switching between multiple clock signals in a digital circuit is provided that includes providing to a clock selector at least three distinct clock signals for the circuit. A master clock signal for the circuit is generated with the clock selector based on a first one of the distinct clock signals. The master clock signal is asynchronously blocked. The master clock signal for the circuit is generated with the clock selector based on a second one of the distinct clock signals. The master clock signal is synchronously blocked.
Technical advantages of the present invention include providing an improved digital circuit for a telecommunications node or other suitable application. In particular, the circuit switches glitchlessly between clock signals. As a result, when the circuit switches from one clock signal to another, the circuit continues to function properly.
Another technical advantage of the present invention includes an improved method and system for switching between multiple clock signals in a digital circuit. In particular, switching may be accomplished without relying on the currently active clock. As a result, when a selected clock malfunctions or fails, the clock signal for the circuit may be switched to a functioning clock signal. Accordingly, the switch is glitchless even if the original clock signal has become inactive.
Another technical advantage of the present invention includes providing a highly reliable digital circuit. In particular, the circuit may employ and switch between three or more clock signals. As a result, greater protection is provided through the use of multiple back-up clocks. Accordingly, critical systems in which failures cannot be tolerated are more stable when the system and method of the present invention are implemented as a part of those systems.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, description, and claims.